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dear customers, about the change in the name such as "oki electric industry co. ltd." and "oki" in documents to oki semiconductor co., ltd. the semiconductor business of oki electric industry co., ltd. was succeeded to oki semiconductor co., ltd. on oc tober 1, 2008. therefore, please accept that although the terms and marks of "oki electric indust ry co., ltd.", ?oki electric?, and "oki" remain in the documents, they all have been changed to "oki semiconductor co., ltd.". it is a change of the company name, the co mpany trademark, and the logo, etc. , and not a content change in documents. october 1, 2008 oki semiconductor co., ltd. 550-1 higashiasakawa-cho, hachio ji-shi, tokyo 193-8550, japan http://www.okisemi.com/en/
1/13 ? semiconductor msm6775 general description the msm6775 is an lcd driver for dynamic display providing 3-duty-switchable pins (1/3, 1/ 4 and 1/5 duty). it can directly drive lcds of up to 400, 320 and 240 segments when 1/5, 1/4 and 1/3 duty are selected, respectively. features ? operating range supply voltage (v dd ) : 2.7 to 5.5v operating temperature (t op ) : C40 to +85 c lcd driving voltage (v dd -v lc3 ) : 3.5 to 5.5v ? segment output : 80 pins 1/5 duty : up to 400 segments can be displayed. 1/4 duty : up to 320 segments can be displayed. 1/3 duty : up to 240 segments can be displayed. ? serial transfer clock frequency : 4mhz ? serial interface with cpu : through three input pins (data, load, and clock) ? one-to-one corresponcence between input data and its output when input data is at "h" level : display goes on. when input data is at "l" level : display goes off. ? built-in oscillator circuit for common signals ? the entire display can be turned off. ( blank pin) ? package: 100-pin plastic tqfp (tqfp100-p-1414-0.50-k) (product name : MSM6775TS-K) ? semiconductor msm6775 1/3, 1/4, 1/5 duty lcd driver with 5-dot common driver and 80-dot segment driver e2b0012-27-y2 this version: nov. 1997 previous version: mar. 1996
2/13 ? semiconductor msm6775 block diagram blank 80-dot segment driver 80-ch data selector 80-bit latch 5 80-bit latch 4 80-bit latch 3 80-bit latch 2 80-bit latch 1 latch selector 88-bit shift register 80 timing generator osc common driver load data clock oscCr oscCc oscCin dsel1 dsel2 v dd v ss v lc1 v lc2 v lc3 com1 com2 com3 com4 com5 seg1 seg80
3/13 ? semiconductor msm6775 pin configuration (top view) 75 1 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 com1 com2 com3 com4 com5 v lc1 v lc2 v lc3 v ss osc-in osc-c osc-r dsel1 dsel2 blank data clock load v dd nc seg80 seg79 seg78 seg77 seg76 seg26 seg27 seg28 seg29 seg30 seg31 seg32 seg33 seg34 seg35 seg36 seg37 seg38 seg39 seg40 seg41 seg42 seg43 seg44 seg45 seg46 seg47 seg48 seg49 seg50 seg51 74 seg24 73 seg23 72 seg22 71 seg21 70 seg20 69 seg19 68 seg18 67 seg17 66 seg16 65 seg15 64 seg14 63 seg13 62 seg12 61 seg11 60 seg10 59 seg9 58 seg8 57 seg7 56 seg6 55 seg5 54 seg4 53 seg3 52 seg2 51 seg1 2 seg52 3 seg53 4 seg54 5 seg55 6 seg56 7 seg57 8 seg58 9 seg59 10 seg60 11 seg61 12 seg62 13 seg63 14 seg64 15 seg65 16 seg66 17 seg67 18 seg68 19 seg69 20 seg70 21 seg71 22 seg72 23 seg73 24 seg74 25 seg75 seg25 nc : no connection 100-pin plastic tqfp
4/13 ? semiconductor msm6775 pin descriptions symbol type osc-in i osc-c o osc-r o data i clock i load i blank i com5 com1 to seg80 seg1 to v lc2 v lc1 v dd v lc3 v ss o o dsel1 i dsel2 i pins for oscillation. the oscillator circuit is configured by externally connecting two resistors and a capacitor. make the wiring length as short as possible, because the resistor connected to the osc-in pin has a higher value and the circuit is susceptible to external noise. serial data input pin. the display goes on when input data is at "h" level, and it goes off when input data is at "l" level. shift clock input pin. data from the data pin is transferred in synchronization with the rising edge of the shift clock. (built-in schmitt circuit is used.) load signal input pin. serially input data is transferred to the 80-bit latch at "h" level of this load signal, then held at "l" level. input pin that turns off all segments. the entire display goes off when "l" level is applied to this pin. the display returns to the previous state when "h" level is applied. input pins to select 1/3, 1/4, or 1/5 duty. following shows how each duty is selected. dsel2 dsel1 l l l h h x duty selected 1/3 1/4 1/5 x: don't care display output pins for lcd. these pins are connected to the common side on the lcd panel. display output pins for lcd. these pins are connected to the segment side on the lcd panel. for the correspondence between the output of these pins and input data, see section, "data structure". bias pins for lcd drive. through these pins, bias voltages for the lcd are externally supplied. the bias potential must meet the following condition: v dd > v lc1 3 v lc2 > v lc3 supply voltage pin and ground pin. description
5/13 ? semiconductor msm6775 absolute maximum ratings parameter supply voltage input voltage storage temperature symbol condition rating unit v dd v i t stg ta=25c ta=25c C0.3 to +6.0 C0.3 to v dd +0.3 C55 to +150 v v c recommended operating conditions oscillator circuit note: see section, "reference data," for the resistor and capacitor values in the table. rc values in oscillator circuit parameter supply voltage lcd driving voltage operating temperature symbol condition range applicable pin v dd v dd C v lc3 t op 2.7 to 5.5 3.5 to 5.5 C40 to +85 v dd v dd , v lc1 , v lc2 , v lc3 unit v v c parameter oscillation resistance oscillation capacitance current limiting resistance common signal frequency symbol condition min max applicable pin r 0 c 0 r 1 f com 20 0.00047 62 25 120 0.01 360 250 osc-r osc-c osc-in com1 to unit k w m f k w hz com5 parameter oscillation resistance oscillation capacitance current limiting resistance symbol 1/3 duty 1/4 duty 1/5 duty applicable pin r 0 c 0 r 1 68 0.001 220 51 0.001 160 43 0.001 130 osc-r osc-c osc-in unit k w m f k w example of an oscillator circuit r 0 c 0 r 1 osc-r osc-c osc-in msm6775
6/13 ? semiconductor msm6775 electrical characteristics dc characteristics *1 applies to the clock and osc-in. *2 applies to all input pins excluding the clock and osc-in. *3 applies to all input pins. *4 applies to com1 to com5. *5 applies to seg1 to seg80. *6 v lc1 =3.0v *7 v lc2 =2.0v *8 v lc3 =1.0v *9 r 0 =51k w r 1 =160k w c 0 =0.001 m f parameter "h" input voltage 1 "l" input voltage 1 "h" input voltage 2 symbol condition min max v ih1 v il1 v ih2 0.8v dd 0.15v dd unit v v v "l" input voltage 2 v il2 v "h" input current v ih v dd =5.5v, v i =v dd m a "l" input current v il v dd =5.5v, v i =0v m a common output voltage v oc0 i o =C100 m av dd C1 v v oc1 i o =100 m av lc1 C1 v v oc2 i o =100 m av lc2 +1 v segment output voltage v oc3 i o =+100 m av lc3 +1 v v os0 i o =C10 m av dd C1 v v os1 i o =10 m av lc1 C1 v v os2 i o =10 m av lc2 +1 v (v dd =2.7 to 5.5v, ta=C40 to +85c) supply current *1 *1 *2 *2 *3 *3 *6 *7 *8 *6 *7 *8 *9 v dd =4.0v *4 v dd =4.0v *5 v dd =5.0v, no load i o =+10 m a 0.85v dd v lc2 C1 v lc2 C1 0.2v dd 10 C10 v lc1 +1 v lc1 +1 v lc3 C1 0.5 v ma v os3 i dd v dd v dd v ss v ss
7/13 ? semiconductor msm6775 ac characteristics t wlo v ih2 v il2 v ih2 v il2 t dh t r1 v il1 v il1 t wlc t whc t f1 v il1 v ih1 v ih1 v il1 v il2 v il2 v ih2 v ih2 t lc t whl t cl 1/f cp v il1 v il1 v il1 v ih1 v ih1 1/f osc t r2 t f2 t who data clock load osc-in (v ih1 =0.85v dd v il1 =0.15v dd ) (v ih2 =0.8v dd v il2 =0.2v dd ) t ds parameter clock frequency clock "h" time clock "l" time symbol condition min max applicable pin f cp t whc t wlc 70 70 4.0 clock unit mh z ns ns data set-up time t ds 50 data ns data hold time t dh 50 clock ns load "h" time t whl 100 load ns clock-to-load time t cl 100 clock ns load-to-clock time t lc 100 load ns rise time, fall time t r1 , t f1 50 clock ns osc-in input frequency f osc 20kh z osc-in "h" time t who 20 osc-in m s osc-in "l" time t wlo 20 m s rise time, fall time t r2 , t f2 100 ns (v dd =2.7 to 5.5v, ta=C40 to +85c)
8/13 ? semiconductor msm6775 functional description operation as shown in "data structure" (next section), the display data consists of the data field corresponding to the output for turning the segments on or off and the select field that selects the input block of data. data input to the data pin is loaded into the 88-bit shift register at the rising edge of the clock signal, transferred to the 80-bit latch while the load signal is at "h" level, and then output via the 80-dot segment driver. new data d 1 d 80 dm1 dm2 dm3 c 1 c 2 c 3 c 4 c 5 1 80 81828384 8586 8788 old data data clock load data in display latch
9/13 ? semiconductor msm6775 data structure input data correspondence between select bits and com1 to com5 notes: 1. arbitrary data can be set for the dummy bits. 2. select bits c 1 to c 5 select 80-bit latches that correspond to com1 to com5, respectively. therefore, if "1" is set for more than one select bit, data is set to all the corresponding 80-bit latches. example: if "1" is set to all the select bits c 1 to c 5 , the display data of d 1 to d 80 is set to all the 80-bit latches that correspond to com1 to com5. c 5 end bit c 4 c 3 c 2 c 1 dm3 dm2 dm1 d 80 d 79 d 5 d 4 d 3 d 2 d 1 corresponds to seg1 first bit corresponds to seg80 select bit ( 5 bits ) dummy bit ( 3 bits ) lcd display data ( 80 bits ) c 5 c 4 c 3 c 2 c 1 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 description display data corresponding to com1 display data corresponding to com2 display data corresponding to com3 display data corresponding to com4 display data corresponding to com5
10/13 ? semiconductor msm6775 application circuits (for 1/4 duty) data clock load blank v dd +5v cpu p o r t r 1 c 0 r 0 osc-in osc-c osc-r dsel1 dsel2 v ss v lc1 v lc2 v lc3 bias circuit 1/4 duty 320-segment lcd panel seg1 seg80 msm6775 com1 com2 com3 com4 com5 open
11/13 ? semiconductor msm6775 reference data the data shown in this section is for reference (a metal film resistor and a film capacitor are used). resistor and capacitor values must be determined based on experiments. use the following expression to convert oscillation frequency to common frame frequency (or vice versa): f com =f osc duty/16 f com : common frame frequency f osc : oscillation frequency duty : e.g., 1/4 for 1/4 duty for example, if f com =100hz at 1/5 duty, the oscillation frequency is f osc =8000hz. 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 i dd [ma] i dd vs. v dd ta=25c r 0 =51k w r 1 =160k w c 0 =0.001 m f 1/4 duty 234567 v dd [v] 80 120 frame frequency [hz] common frame frequency vs. v dd (the resistor and capacitor values used are their recommended values.) ta=25c 1/3 duty 1/4 duty 1/5 duty 234567 v dd [v] 110 100 90
12/13 ? semiconductor msm6775 20 30 40 50 60 70 80 90 c 0 =0.00047 m f c 0 =0.001 m f c 0 =0.0022 m f c 0 =0.0047 m f 100 r 1 3r 0 ta=25c oscillation frequency vs. r 0 (v dd =3v) 10 5 10 4 1000 100 frequency [hz] r 0 [k w ] ~ ~ 20 30 40 50 60 70 80 90 c 0 =0.00047 m f c 0 =0.001 m f c 0 =0.0022 m f c 0 =0.0047 m f 100 r 1 3r 0 ta=25c oscillation frequency vs. r 0 (v dd =5v) 10 5 10 4 1000 100 frequency [hz] r 0 [k w ] ~ ~
13/13 ? semiconductor msm6775 (unit : mm) package dimensions notes for mounting the surface mount type package the sop, qfp, tsop, soj, qfj (plcc), shp and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). tqfp100-p-1414-0.50-k package material lead frame material pin treatment solder plate thickness package weight (g) epoxy resin 42 alloy solder plating 5 m m or more 0.55 typ. mirror finish

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